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1. general description the 74hc40103 is a high-speed si-gate cmos device and are pin compatible with the 40103 of the 4000b series. the 74hc40103 is speci?ed in compliance with jedec standard no. 7a. the 74hc40103 consists of an 8-bit synchronous down counter with a single output which is active when the internal count is zero. the 74hc40103 contains a single 8-bit binary counter and has control inputs for enabling or disabling the clock (cp), for clearing the counter to its maximum count and for presetting the counter either synchronously or asynchronously. all control inputs and the terminal count output ( tc) are active-low logic. in normal operation, the counter is decremented by one count on each positive-going transition of the clock (cp). counting is inhibited when the terminal enable input ( te) is high. the terminal count output ( tc) goes low when the count reaches zero if te is low, and remains low for one full clock period. when the synchronous preset enable input ( pe) is low, data at the jam input (p0 to p7) is clocked into the counter on the next positive-going clock transition regardless of the state of te. when the asynchronous preset enable input ( pl) is low, data at the jam input (p0 to p7) is asynchronously forced into the counter regardless of the state of pe, te, or cp. the jam inputs (p0 to p7) represent a single 8-bit binary word. when the master reset input ( mr) is low, the counter is asynchronously cleared to its maximum count (decimal 255) regardless of the state of any other input. if all control inputs except te are high at the time of zero count, the counters will jump to the maximum count, giving a counting sequence of 256 clock pulses long. the 74hc40103 may be cascaded using the te input and the tc output, in either a synchronous or ripple mode. 74hc40103 8-bit synchronous binary down counter rev. 03 12 november 2004 product data sheet
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 2 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 2. features n cascadable n synchronous or asynchronous preset n low-power dissipation n complies with jedec standard no. 7a n esd protection: u hbm eia/jesd22-a114-b exceeds 2000 v u mm eia/jesd22-a115-a exceeds 200 v. n multiple package options n speci?ed from - 40 cto+80 c and from - 40 c to +125 c. 3. applications n divide-by-n counters n programmable timers n interrupt timers n cycle/program counters. 4. quick reference data [1] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l v cc 2 f o ) = sum of outputs. table 1: quick reference data gnd = 0 v; t amb =25 c; t r =t f = 6 ns. symbol parameter conditions min typ max unit t phl , t plh propagation delay cp to tc c l = 15 pf; v cc = 5 v -30-ns f max maximum clock frequency c l = 15 pf; v cc = 5 v - 32 - mhz c i input capacitance - 3.5 - pf c pd power dissipation capacitance v i = gnd to v cc [1] -24-pf
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 3 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 5. ordering information 6. functional diagram table 2: ordering information type number package temperature range name description version 74hc40103n - 40 c to +125 c dip16 plastic dual in-line package; 16 leads (300 mil) sot38-4 74hc40103d - 40 c to +125 c so16 plastic small outline package; 16 leads; body width 3.9 mm sot109-1 74HC40103DB - 40 c to +125 c ssop16 plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 74hc40103pw - 40 c to +125 c tssop16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 fig 1. functional diagram fig 2. logic symbol 001aab923 p3 p4 p5 p6 7 10 11 12 p7 13 p0 p1 p2 4 5 6 1cp pe 15 pl 9 te tc 3 14 mr 2 001aab921 p0 p1 p2 p3 p4 p5 p6 p7 pl tc 9 te 3 cp 1 14 13 12 11 10 7 6 5 4 mr 2 pe 15
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 4 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter fig 3. iec logic symbol fig 4. timing diagram 001aab922 2 ct = 255 9 c3 / g4 15 g2 3 en1 1 1, 2, 4- 2c3 14 0 7 13 12 11 10 7 3ct 1ct = 0 6 5 4 ctr8 001aab925 cp mr te pe pl p0 p1 p2 p3 p4 p5 p6 p7 tc count 255 254 32102552542542538 7654255254253252
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx 9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 5 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter fig 5. logic diagram 001aab924 te to other 7 flip-flops ff 1 mr j p0 j q cp pl pe pe pl cp mr te ff 2 mr j p1 j q cp pl pe te ff 3 mr j p2 j q cp pl pe te ff 4 mr j p3 j q cp te pl pe te ff 5 mr j p4 j q cp pl pe te ff 6 mr j p5 j q cp pl pe te ff 7 mr j p6 j q cp pl pe te ff 8 mr j p7 tc j q cp pl pe
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 6 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 7. pinning information 7.1 pinning 7.2 pin description fig 6. pin con?guration 40103 cp v cc mr pe te tc p0 p7 p1 p6 p2 p5 p3 p4 gnd pl 001aab920 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 table 3: pin description symbol pin description cp 1 clock input (low-to-high, edge-triggered) mr 2 asynchronous master reset input (active low) te 3 terminal enable input (active low) p0 4 jam input 0 p1 5 jam input 1 p2 6 jam input 2 p3 7 jam input 3 gnd 8 ground (0 v) pl 9 asynchronous preset enable input (active low) p4 10 jam input 4 p5 11 jam input 5 p5 12 jam input 6 p7 13 jam input 7 tc 14 terminal count output (active low) pe 15 synchronous preset enable input (active low) v cc 16 positive supply voltage
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 7 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 8. functional description 8.1 function table [1] h = high voltage level; l = low voltage level; x = dont care. [2] clock connected to cp. synchronous operation: changes occur on the low-to-high cp transition. jam inputs: msd = p7, lsd = p0. 9. limiting values [1] above 70 c: p tot derates linearly with 12 mw/k. [2] above 70 c: p tot derates linearly with 8 mw/k. table 4: function table [1] control inputs preset mode action [2] mr pl pe te l x x x asynchronous clear to maximum count h l x x asynchronous preset asynchronously h l x synchronous preset on next low-to high clock transition h l synchronous count down h synchronous inhibit counter table 5: limiting values in accordance with the absolute maximum rating system (iec 60134). voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min max unit v cc supply voltage - 0.5 +7 v i ik input diode current v i < - 0.5 v or v i >v cc + 0.5 v - 20 ma i ok output diode current v o < - 0.5 v or v o >v cc + 0.5 v - 20 ma i o output source or sink current v o = - 0.5 v to v cc + 0.5 v - 25 ma i cc , i gnd v cc or gnd current - 50 ma t stg storage temperature - 65 +150 c p tot power dissipation dip16 package [1] - 750 mw so16, ssop16 and tssop16 packages [2] - 500 mw
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 8 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 10. recommended operating conditions 11. static characteristics table 6: recommended operating conditions symbol parameter conditions min typ max unit v cc supply voltage 2.0 5.0 6.0 v v i input voltage 0 - v cc v v o output voltage 0 - v cc v t r , t f input rise and fall times v cc = 2.0 v - - 1000 ns v cc = 4.5 v - 6.0 500 ns v cc = 6.0 v - - 400 ns t amb ambient temperature - 40 - +125 c table 7: static characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit t amb =25 c v ih high-level input voltage v cc = 2.0 v 1.5 1.2 - v v cc = 4.5 v 3.15 2.4 - v v cc = 6.0 v 4.2 3.2 - v v il low-level input voltage v cc = 2.0 v - 0.8 0.5 v v cc = 4.5 v - 2.1 1.35 v v cc = 6.0 v - 2.8 1.8 v v oh high-level output voltage v i =v ih or v il i o = - 20 m a; v cc = 2.0 v 1.9 2.0 - v i o = - 20 m a; v cc = 4.5 v 4.4 4.5 - v i o = - 20 m a; v cc = 6.0 v 5.9 6.0 - v i o = - 4 ma; v cc = 4.5 v 3.98 4.32 - v i o = - 5.2 ma; v cc = 6.0 v 5.48 5.81 - v v ol low-level output voltage v i =v ih or v il i o =20 m a; v cc = 2.0 v - 0 0.1 v i o =20 m a; v cc = 4.5 v - 0 0.1 v i o =20 m a; v cc = 6.0 v - 0 0.1 v i o = 4 ma; v cc = 4.5 v - 0.15 0.26 v i o = 5.2 ma; v cc = 6.0 v - 0.16 0.26 v i li input leakage current v i =v cc or gnd; v cc = 6.0 v - - 0.1 m a i cc quiescent supply current v i =v cc or gnd; i o = 0 a; v cc = 6.0 v - - 8.0 m a c i input capacitance - 3.5 - pf
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 9 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter t amb = - 40 c to +85 c v ih high-level input voltage v cc = 2.0 v 1.5 - - v v cc = 4.5 v 3.15 - - v v cc = 6.0 v 4.2 - - v v il low-level input voltage v cc = 2.0 v - - 0.5 v v cc = 4.5 v - - 1.35 v v cc = 6.0 v - - 1.8 v v oh high-level output voltage v i =v ih or v il i o = - 20 m a; v cc = 2.0 v 1.9 - - v i o = - 20 m a; v cc = 4.5 v 4.4 - - v i o = - 20 m a; v cc = 6.0 v 5.9 - - v i o = - 4 ma; v cc = 4.5 v 3.84 - - v i o = - 5.2 ma; v cc = 6.0 v 5.34 - - v v ol low-level output voltage v i =v ih or v il i o =20 m a; v cc = 2.0 v - - 0.1 v i o =20 m a; v cc = 4.5 v - - 0.1 v i o =20 m a; v cc = 6.0 v - - 0.1 v i o = 4 ma; v cc = 4.5 v - - 0.33 v i o = 5.2 ma; v cc = 6.0 v - - 0.33 v i li input leakage current v i =v cc or gnd; v cc = 6.0 v - - 1.0 m a i cc quiescent supply current v i =v cc or gnd; i o = 0 a; v cc = 6.0 v - - 80 m a t amb = - 40 c to +125 c v ih high-level input voltage v cc = 2.0 v 1.5 - - v v cc = 4.5 v 3.15 - - v v cc = 6.0 v 4.2 - - v v il low-level input voltage v cc = 2.0 v - - 0.5 v v cc = 4.5 v - - 1.35 v v cc = 6.0 v - - 1.8 v v oh high-level output voltage v i =v ih or v il i o = - 20 m a; v cc = 2.0 v 1.9 - - v i o = - 20 m a; v cc = 4.5 v 4.4 - - v i o = - 20 m a; v cc = 6.0 v 5.9 - - v i o = - 4 ma; v cc = 4.5 v 3.7 - - v i o = - 5.2 ma; v cc = 6.0 v 5.2 - - v table 7: static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 10 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 12. dynamic characteristics v ol low-level output voltage v i =v ih or v il i o =20 m a; v cc = 2.0 v - - 0.1 v i o =20 m a; v cc = 4.5 v - - 0.1 v i o =20 m a; v cc = 6.0 v - - 0.1 v i o = 4 ma; v cc = 4.5 v - - 0.4 v i o = 5.2 ma; v cc = 6.0 v - - 0.4 v i li input leakage current v i =v cc or gnd; v cc = 6.0 v - - 1.0 m a i cc quiescent supply current v i =v cc or gnd; i o = 0 a; v cc = 6.0 v - - 160 m a table 7: static characteristics continued at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter conditions min typ max unit table 8: dynamic characteristics gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; see figure 13 . symbol parameter conditions min typ max unit t amb = 25 c t phl , t plh propagation delay cp to tc see figure 7 v cc = 2.0 v - 96 300 ns v cc = 4.5 v - 35 60 ns v cc = 6.0 v - 28 51 ns v cc = 5.0 v; c l =15pf - 30 - ns propagation delay te to tc see figure 8 v cc = 2.0 v - 50 175 ns v cc = 4.5 v - 18 35 ns v cc = 6.0 v - 14 30 ns propagation delay pl to tc see figure 9 v cc = 2.0 v - 102 315 ns v cc = 4.5 v - 37 63 ns v cc = 6.0 v - 30 53 ns t phl propagation delay mr to tc see figure 9 v cc = 2.0 v - 83 275 ns v cc = 4.5 v - 30 55 ns v cc = 6.0 v - 24 47 ns t thl , t tlh output transition time see figure 8 v cc = 2.0 v - 19 75 ns v cc = 4.5 v - 7 15 ns v cc = 6.0 v - 6 13 ns
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 11 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter t w cp clock pulse width high or low see figure 7 v cc = 2.0 v 165 22 - ns v cc = 4.5 v 33 8 - ns v cc = 6.0 v 28 6 - ns mr master reset pulse width low see figure 9 v cc = 2.0 v 125 39 - ns v cc = 4.5 v 25 14 - ns v cc = 6.0 v 21 11 - ns pl preset enable pulse width low see figure 9 v cc = 2.0 v 125 33 - ns v cc = 4.5 v 25 12 - ns v cc = 6.0 v 21 10 - ns t rem removal time mr to cp, pl to cp see figure 10 v cc = 2.0 v 50 14 - ns v cc = 4.5 v 10 5 - ns v cc = 6.0 v 9 4 - ns t su set-up time pe to cp see figure 11 v cc = 2.0 v 75 22 - ns v cc = 4.5 v 15 8 - ns v cc = 6.0 v 13 6 - ns set-up time te to cp see figure 12 v cc = 2.0 v 150 44 - ns v cc = 4.5 v 30 16 - ns v cc = 6.0 v 26 13 - ns set-up time pn to cp see figure 11 v cc = 2.0 v 75 22 - ns v cc = 4.5 v 15 8 - ns v cc = 6.0 v 13 6 - ns t h hold time pe to cp see figure 11 v cc = 2.0 v 0 - 14 - ns v cc = 4.5 v 0 - 5- ns v cc = 6.0 v 0 - 4- ns hold time te to cp see figure 12 v cc = 2.0 v 0 - 30 - ns v cc = 4.5 v 0 - 11 - ns v cc = 6.0 v 0 - 9- ns hold time pn to cp see figure 11 v cc = 2.0 v 0 - 17 - ns v cc = 4.5 v 0 - 6- ns v cc = 6.0 v 0 - 5- ns table 8: dynamic characteristics continued gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; see figure 13 . symbol parameter conditions min typ max unit
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 12 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter f max maximum clock frequency see figure 7 v cc = 2.0 v 3.0 10 - mhz v cc = 4.5 v 15 29 - mhz v cc = 6.0 v 18 35 - mhz v cc = 5.0 v; c l = 15 pf - 32 - mhz c pd power dissipation capacitance v i = gnd to v cc [1] -24-pf t amb = - 40 c to +85 c t phl , t plh propagation delay cp to tc see figure 7 v cc = 2.0 v - - 375 ns v cc = 4.5 v - - 75 ns v cc = 6.0 v - - 64 ns propagation delay te to tc see figure 8 v cc = 2.0 v - - 220 ns v cc = 4.5 v - - 44 ns v cc = 6.0 v - - 37 ns propagation delay pl to tc see figure 9 v cc = 2.0 v - - 395 ns v cc = 4.5 v - - 79 ns v cc = 6.0 v - - 40 ns t phl propagation delay mr to tc see figure 9 v cc = 2.0 v - - 345 ns v cc = 4.5 v - - 69 ns v cc = 6.0 v - - 59 ns t thl , t tlh output transition time see figure 8 v cc = 2.0 v - - 95 ns v cc = 4.5 v - - 19 ns v cc = 6.0 v - - 16 ns t w cp clock pulse width high or low see figure 7 v cc = 2.0 v 205 - - ns v cc = 4.5 v 41 - - ns v cc = 6.0 v 35 - - ns mr master reset pulse width low see figure 9 v cc = 2.0 v 155 - - ns v cc = 4.5 v 31 - - ns v cc = 6.0 v 26 - - ns pl preset enable pulse width low see figure 9 v cc = 2.0 v 155 - - ns v cc = 4.5 v 31 - - ns v cc = 6.0 v 26 - - ns table 8: dynamic characteristics continued gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; see figure 13 . symbol parameter conditions min typ max unit
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 13 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter t rem removal time mr to cp, pl to cp see figure 10 v cc = 2.0 v 65 - - ns v cc = 4.5 v 13 - - ns v cc = 6.0 v 11 - - ns t su set-up time pe to cp see figure 11 v cc = 2.0 v 95 - - ns v cc = 4.5 v 19 - - ns v cc = 6.0 v 16 - - ns set-up time te to cp see figure 12 v cc = 2.0 v 190 - - ns v cc = 4.5 v 38 - - ns v cc = 6.0 v 33 - - ns set-up time pn to cp see figure 11 v cc = 2.0 v 95 - - ns v cc = 4.5 v 19 - - ns v cc = 6.0 v 16 - - ns t h hold time pe to cp see figure 11 v cc = 2.0 v 0 - - ns v cc = 4.5 v 0 - - ns v cc = 6.0 v 0 - - ns hold time te to cp see figure 12 v cc = 2.0 v 0 - - ns v cc = 4.5 v 0 - - ns v cc = 6.0 v 0 - - ns hold time pn to cp see figure 11 v cc = 2.0 v 0 - - ns v cc = 4.5 v 0 - - ns v cc = 6.0 v 0 - - ns f max maximum clock frequency see figure 7 v cc = 2.0 v 2.4 - - mhz v cc = 4.5 v 12 - - mhz v cc = 6.0 v 14 - - mhz table 8: dynamic characteristics continued gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; see figure 13 . symbol parameter conditions min typ max unit
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 14 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter t amb = - 40 c to +125 c t phl /t plh propagation delay cp to tc see figure 7 v cc = 2.0 v - - 450 ns v cc = 4.5 v - - 90 ns v cc = 6.0 v - - 77 ns propagation delay te to tc see figure 8 v cc = 2.0 v - - 265 ns v cc = 4.5 v - - 53 ns v cc = 6.0 v - - 45 ns propagation delay pl to tc see figure 9 v cc = 2.0 v - - 475 ns v cc = 4.5 v - - 95 ns v cc = 6.0 v - - 81 ns t phl propagation delay mr to tc see figure 9 v cc = 2.0 v - - 415 ns v cc = 4.5 v - - 83 ns v cc = 6.0 v - - 71 ns t thl /t tlh output transition time see figure 8 v cc = 2.0 v - - 110 ns v cc = 4.5 v - - 22 ns v cc = 6.0 v - - 19 ns t w cp clock pulse width high or low see figure 7 v cc = 2.0 v 250 - - ns v cc = 4.5 v 50 - - ns v cc = 6.0 v 43 - - ns mr master reset pulse width low see figure 9 v cc = 2.0 v 190 - - ns v cc = 4.5 v 38 - - ns v cc = 6.0 v 32 - - ns pl preset enable pulse width low see figure 9 v cc = 2.0 v 190 - - ns v cc = 4.5 v 38 - - ns v cc = 6.0 v 32 - - ns t rem removal time mr to cp, pl to cp see figure 10 v cc = 2.0 v 75 - - ns v cc = 4.5 v 15 - - ns v cc = 6.0 v 13 - - ns table 8: dynamic characteristics continued gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; see figure 13 . symbol parameter conditions min typ max unit
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 15 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter [1] c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ ? (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in v; n = number of inputs switching; ? (c l v cc 2 f o ) = sum of outputs. t su set-up time pe to cp see figure 11 v cc = 2.0 v 110 - - ns v cc = 4.5 v 22 - - ns v cc = 6.0 v 19 - - ns set-up time te to cp see figure 12 v cc = 2.0 v 225 - - ns v cc = 4.5 v 45 - - ns v cc = 6.0 v 38 - - ns set-up time pn to cp see figure 11 v cc = 2.0 v 110 - - ns v cc = 4.5 v 22 - - ns v cc = 6.0 v 19 - - ns t h hold time pe to cp see figure 11 v cc = 2.0 v 0 - - ns v cc = 4.5 v 0 - - ns v cc = 6.0 v 0 - - ns hold time te to cp see figure 12 v cc = 2.0 v 0 - - ns v cc = 4.5 v 0 - - ns v cc = 6.0 v 0 - - ns hold time pn to cp see figure 11 v cc = 2.0 v 0 - - ns v cc = 4.5 v 0 - - ns v cc = 6.0 v 0 - - ns f max maximum clock frequency see figure 7 v cc = 2.0 v 2.0 - - mhz v cc = 4.5 v 10 - - mhz v cc = 6.0 v 12 - - mhz table 8: dynamic characteristics continued gnd = 0 v; t r =t f = 6 ns; c l = 50 pf; see figure 13 . symbol parameter conditions min typ max unit
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 16 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 13. waveforms v m = 0.5 v i .v m = 0.5 v i . fig 7. waveforms showing the clock input (cp) to tc propagation delays, the clock pulse width, the output transition times and the maximum clock pulse frequency fig 8. waveforms showing the te to tc propagation delays 001aab926 cp input tc output v m t phl t thl t tlh t plh v m t w 1/f max 001aab927 te input tc output v m t phl t thl t tlh t plh v m v m = 0.5 v i .v m = 0.5 v i . fig 9. waveforms showing pl, mr,pnto tc propagation delays fig 10. waveforms showing removal time for mr and pl 001aab928 pn, pl, mr input tc output v m t phl t plh v m t w 001aab929 pl, mr input cp input v m t rem v m t w
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 17 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter the shaded areas indicate when the input is permitted to change for predictable output performance. v m = 0.5 v i . v m = 0.5 v i . fig 11. waveforms showing hold and set-up times for pn, pe to cp fig 12. waveforms showing hold and set-up times for mr or pe to cp v m v m stable 001aab931 pe input cp input p0 to p7 input t su t h v m t su t h 001aab930 te or pe input cp input v m t su t h v m test data is given in t ab le 9 . de?nitions for test circuit: r t = termination resistance should be equal to output impedance z o of the pulse generator. c l = load capacitance including jig and probe capacitance. fig 13. load circuitry for switching times table 9: test data supply input load v cc v i t r , t f c l 2.0 v v cc 6 ns 50 pf 4.5 v v cc 6 ns 50 pf 6.0 v v cc 6 ns 50 pf 5.0 v v cc 6 ns 15 pf mna101 v cc v i v o r t c l pulse generator d.u.t.
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 18 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 14. application information fig 14. programmable timer fig 15. divide-by-n counter 001aab932 tc cp p0 v cc 10k w time-out start t p7 gnd 40103 v cc f in te pe pl mr n 001aab933 tc cp p0 p7 gnd 40103 v cc f out = f in f in n + 1 te pe pl mr n
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 19 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 15. package outline fig 16. package outline sot38-4 (dip16) references outline version european projection issue date iec jedec jeita sot38-4 95-01-14 03-02-13 m h c (e ) 1 m e a l seating plane a 1 w m b 1 b 2 e d a 2 z 16 1 9 8 e pin 1 index b 0 5 10 mm scale note 1. plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. unit a max. 12 b 1 (1) (1) (1) b 2 cd e e m z h l mm dimensions (inch dimensions are derived from the original mm dimensions) a min. a max. b max. w m e e 1 1.73 1.30 0.53 0.38 0.36 0.23 19.50 18.55 6.48 6.20 3.60 3.05 0.254 2.54 7.62 8.25 7.80 10.0 8.3 0.76 4.2 0.51 3.2 inches 0.068 0.051 0.021 0.015 0.014 0.009 1.25 0.85 0.049 0.033 0.77 0.73 0.26 0.24 0.14 0.12 0.01 0.1 0.3 0.32 0.31 0.39 0.33 0.03 0.17 0.02 0.13 dip16: plastic dual in-line package; 16 leads (300 mil) sot38-4
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 20 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter fig 17. package outline sot109-1 (so16) x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 21 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter fig 18. package outline sot338-1 (ssop16) unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 7.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 8 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot338-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 8 16 9 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 a max. 2
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 22 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter fig 19. package outline sot403-1 (tssop16) unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 23 of 25 philips semiconductors 74hc40103 8-bit synchronous binary down counter 16. revision history table 10: revision history document id release date data sheet status change notice doc. number supersedes 74hc40103_3 20041112 product data sheet - 9397 750 13812 74hc_hct40103_cnv_2 modi?cations: ? the format of this data sheet has been redesigned to comply with the current presentation and information standard of philips semiconductors. ? removed type number 74hct40103. ? inserted family speci?cation. 74hc_hct40103_cnv_2 19970918 product speci?cation - - 74hc_hct40103_1 74hc_hct40103_1 19901201 product speci?cation - - -
philips semiconductors 74hc40103 8-bit synchronous binary down counter 9397 750 13812 ? koninklijke philips electronics n.v. 2004. all rights reserved. product data sheet rev. 03 12 november 2004 24 of 25 17. data sheet status [1] please consult the most recently issued data sheet before initiating or completing a design. [2] the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the l atest information is available on the internet at url http://www.semiconductors.philips.com. [3] for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 18. de?nitions short-form speci?cation the data in a short-form speci?cation is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values de?nition limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the speci?cation is not implied. exposure to limiting values for extended periods may affect device reliability. application information applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the speci?ed use without further testing or modi?cation. 19. disclaimers life support these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change noti?cation (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise speci?ed. 20. contact information for additional information, please visit: http://www.semiconductors.philips.com for sales of?ce addresses, send an email to: sales.addresses@www.semiconductors.philips.com level data sheet status [1] product status [2] [3] de?nition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn).
? koninklijke philips electronics n.v. 2004 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. date of release: 12 november 2004 document number: 9397 750 13812 published in the netherlands philips semiconductors 74hc40103 8-bit synchronous binary down counter 21. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 5 ordering information . . . . . . . . . . . . . . . . . . . . . 3 6 functional diagram . . . . . . . . . . . . . . . . . . . . . . 3 7 pinning information . . . . . . . . . . . . . . . . . . . . . . 6 7.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 8 functional description . . . . . . . . . . . . . . . . . . . 7 8.1 function table . . . . . . . . . . . . . . . . . . . . . . . . . . 7 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 7 10 recommended operating conditions. . . . . . . . 8 11 static characteristics. . . . . . . . . . . . . . . . . . . . . 8 12 dynamic characteristics . . . . . . . . . . . . . . . . . 10 13 waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 14 application information. . . . . . . . . . . . . . . . . . 18 15 package outline . . . . . . . . . . . . . . . . . . . . . . . . 19 16 revision history . . . . . . . . . . . . . . . . . . . . . . . . 23 17 data sheet status . . . . . . . . . . . . . . . . . . . . . . . 24 18 de?nitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 19 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 20 contact information . . . . . . . . . . . . . . . . . . . . 24

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